Digital Computer Arithmetic Datapath Design Using Verilog HDL (International Series in Operations Researchand Management Science)
James E. Stine
This text presents basic implementation strategies for arithmetic datapath designs and methodologies utilized in the digital system. The author implements various datapath designs for addition, subtraction, multiplication, and division. Theory is presented to illustrate and explain why certain designs are chosen. Each implementation is discussed in terms of design choices and how particular theory is invoked in the hardware. Along with the theory that emphasizes the design in question, Verilog modules are presented for understanding the basic ideas that accompany each design. Structural models are implemented to guarantee correct synthesis and for incorporation into VLSI schematic-capture programs.
카테고리:
년:
2003
판:
1
언어:
english
페이지:
224
ISBN 10:
1402077106
ISBN 13:
9781402077104
파일:
PDF, 617 KB
IPFS:
,
english, 2003